Technical Field
The present invention relates to a silicon carbide semiconductor device and a method of manufacturing the silicon carbide semiconductor device.
Background Art
Silicon carbide (SiC) has low on-resistance and excellent high speed and high temperature performance and has therefore conventionally attracted attention as a next-generation power semiconductor material. As further background, silicon carbide exhibits a critical electric field strength of at least an order of magnitude greater than that of silicon (Si), makes it possible to maintain sufficient breakdown voltage even at high impurity concentrations, and makes it possible to achieve a much more dramatic reduction in on-resistance than with silicon. Silicon carbide is a material with exceptional chemical stability that also offers advantages such as having a wide bandgap of 3.26 eV and being suitable for use as a semiconductor in an extremely stable manner even at high temperatures. Silicon carbide is therefore theoretically capable of exceeding the material limits of silicon (the so-called silicon limit) and shows enormous potential for use in power semiconductor device applications.
Metal-oxide-semiconductor field-effect transistor (MOSFET) structures have been disclosed as semiconductor devices that use silicon carbide (hereinafter, “silicon carbide semiconductor devices”) (see Patent Document 1 (FIGS. 1 and 9) and Patent Document 2 (FIG. 1), for example). In Patent Documents 1 and 2, a semiconductor substrate (hereinafter, a “silicon carbide substrate”) formed by epitaxially growing a silicon carbide layer on top of an n+ supporting substrate made of silicon carbide (hereinafter, an “n+ silicon carbide substrate”) is used to form a MOSFET. More specifically, in Patent Document 1, an n− drift layer made of silicon carbide is layered on top of an n+ silicon carbide substrate, and in Patent Document 2, an n− drift layer and a p-type base layer made of silicon carbide are layered in order on top of an n+ silicon carbide substrate.
Next, a planar-gate vertical MOSFET will be described as an example of a conventional silicon carbide semiconductor device. FIG. 4A is a cross-sectional view illustrating the state of a conventional semiconductor device while a body diode is conducting current in a forward direction. FIG. 4A illustrates a state in which a positive voltage Vsd relative to a drain electrode 111 is applied to a source electrode 109, a p-n junction 112 between p-type base regions 103 and an n− drift layer 102 is forward-biased such that a body diode 113 conducts current in a forward direction, and a gate electrode 107 is negative-biased (that is, a gate voltage Vgs<0V). The conventional silicon carbide semiconductor device illustrated in FIG. 4A includes a typical MOS gate structure formed on the (0001) plane (the so-called Si-face; here, the surface on the n− drift layer 102 side) side of a silicon carbide substrate (a semiconductor chip) 110, for example.
The silicon carbide substrate 110 is a semiconductor substrate formed by layering the n− drift layer 102 (which is made of silicon carbide) on the Si-face of an n+ supporting substrate made of silicon carbide (hereinafter, an “n+ silicon carbide substrate”) 101. The MOS gate structure includes p-type base regions 103 (103a and 103b), n+ source regions 104, p+ contact regions 105, a gate insulating film 106, and a gate electrode 107. The body diode 113 (which is a parasitic p-n diode) is formed at the p-n junction 112 between the p-type base regions 103 and the n− drift layer 102. A source electrode 109 contacts the n+ source regions 104 and the p+ contact regions 105 and is thereby electrically connected to the p-type base regions 103. The reference character 108 is an interlayer insulating film. The drain electrode 111 is formed on the (000-1) plane (the so-called C-face; here, the C-face of the n+ silicon carbide substrate 101) of the silicon carbide substrate 110.
This type of silicon carbide MOSFET (hereinafter, “SiC-MOSFET”) shows good potential for use as a low on-resistance, high switching speed switching device in power converters such as motor control inverters and uninterruptible power supplies (UPS). In an inverter, bridge-connected SiC-MOSFETs are switched ON and OFF to control the current (load current) flowing through an inductive load such as a motor. To prevent the SiC-MOSFETs from being damaged by load current created by the counter-electromotive force (surge) of the inductive load, protective diodes (free wheel diodes) for diverting the load current created by the counter-electromotive force of the inductive load are required.
Usually, the integrated body diodes 113 in the SiC-MOSFETs are used as the protective diodes (free wheel diodes) (a diode rectification scheme). However, because silicon carbide is a semiconductor that has a wider bandgap than silicon (hereinafter, a “wide-bandgap semiconductor”), the body diodes 113 have a high threshold voltage (that is, the forward voltage Vf at which a forward current If begins to flow), and the resulting power loss is large. Therefore, a synchronous rectification scheme is sometimes used. In this scheme, the bridge-connected SiC-MOSFETs are alternately switched ON and OFF to achieve rectification, and the SiC-MOSFETs are switched ON while the load current is being diverted in order to decrease the forward voltage Vf of the body diodes 113. Moreover, schemes in which a Schottky barrier diode (SBD) is connected in parallel to the body diode 113 to divert the load current and reduce the forward voltage Vf of the body diode 113 have also been proposed.